Magnetic sensors provide a promising route to realize nanoscale current imaging in the next generation integrated circuits. The semiconductor industry has been consistently reducing the size of transistors, reducing the size and adding more interconnect metallization, and using a variety of packaging technologies to accommodate the increased circuit density with the resultant heat dissipation without compromising signal delay times.
The increased level of metal interconnect required for the increasing number of transistors, limits thermal and optical techniques commonly used today for fault isolation. Complex devices being developed have six levels of metal, and many companies manufacture electronic devices with 8-10 levels of metal.
Optical and thermal techniques commonly used for fault isolation in the integrated circuits are ineffective beyond three levels of the metal layerization. Further complicating die level analysis are current trends in packaging technology. Flip-chip packaging requires that non-destructive measurements be made through the silicon substrate. Stacked die packaging may require that measurement be made through multiple die and packaging layers having a variety of materials. The package substrates for the new integrated circuits are also becoming more complex with finer line dimension approaching 10 nm and many layers of metallization (as high as ten layers), often having several ground and power planes that complicate non-destructive analysis.
Any non-destructive analysis technique must be able to look or be operative through many layers of metallization and packaging materials in order to sense defects in the deeper layers. In the extreme case of stacked die packaging, means of imaging at depths in the range of millimeters is required. These trends have produced a clear need for failure analysis that would enable the localization of buried nanoscale and non-visual defects with a resolution below 500 nm and sensitivity to detect currents as low as 50 nA. Hence, novel probes with extreme current sensitivity and spatial resolution that can image buried layers are needed. Without this capability, the development of new circuits and analysis of failures in semiconductor devices will be greatly hampered, limiting the semiconductor industry in its ability to bring advanced devices quickly to commercialization.
Scanning SQUID (Superconducting Quantum Interference Device) microscopy has proven that magnetic field sensitive probes can be powerful tools for imaging current flow in electronic devices. Through its extraordinary sensitivity to magnetic fields, SQUID sensors are able to detect small currents even if they are buried hundreds of microns below a sample surface. Scanning SQUID microscopy has become a mainstream tool for package-level fault isolation and an effective tool for die-level fault isolation. This technology has been driven by the need for tools to non-destructively isolate defects through complex packaging-like flip-chip multichip modules and stacked die packaging through ever-increasing numbers of metal layers in state-of-the-art die.
As more semiconductor manufacturing companies have begun to use SQUID microscopy, advancing technological development is required in two areas. In the packaging domain, SQUID microscopy has been very successful at localizing electrical shorts and high resistance defects. In the die domain, the ever-shrinking geometries of the micro-structures require development of higher resolution capability. The spatial resolution of the scanning SQUID microscope, however, has historically been limited to lengths greater than several microns, since it is difficult to fabricate functioning SQUIDs with dimensions smaller than the necessary scale.
Magnetic sensors, even in micron scale are generally fabricated on macroscopic substrates, at least hundreds of microns on a side, not allowing these magnetic probes to reach within a few microns of current lines in most powered and packaged devices. In front side scanning this large probe size does not permit the scanning of lines near powering probes or wire bonds. In back side scanning it does not permit fitting within etched cavities made to expose buried layers as illustrated in FIG. 1. The physical limitations of current magnetic sensors in applications to non-destructive failure analysis in the semiconductor devices is that the spatial resolution is roughly limited to sizes larger than one-fifth of the separation between the sensor and the current source. Present day magnetic sensors cannot be located near enough to many structures in powered and packaged devices to image nanoscale, microAmp-level currents. Since SQUIDs smaller than 1 μm on a side have not been successfully fabricated, the direct nanoscale imaging using these sensors is not likely, since the spatial resolution is also roughly limited to sizes larger than the sensor size.
Another limitation in the application of the magnetic sensors to destructive failure analysis is that the spatial separation between the SQUID, which must be maintained in a cryogenic environment, and the sample, which is in air at room temperature, must be at least 10 μm to relieve the thermal gradient and contain the SQUID in its environment (generally vacuum or liquid nitrogen), making direct nanoscale imaging using the standard SQUID sensors an unlikely prospect.
It is therefore desirable to provide a non-destructive failure analysis tool using the existing highly sensitive magnetic sensors where the important resolution limitations associated with the present day magnetic sensors is overcome to achieve high sensitivity nanoscale current imaging of a large range of packaged microelectronic devices.